STMicroelectronics /STM32U5Gx /LPTIM1 /ISR_output

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Interpret as ISR_output

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (CC1IF)CC1IF 0 (ARRM)ARRM 0 (EXTTRIG)EXTTRIG 0 (CMP1OK)CMP1OK 0 (ARROK)ARROK 0 (UP)UP 0 (DOWN)DOWN 0 (UE)UE 0 (REPOK)REPOK 0 (CC2IF)CC2IF 0 (CMP2OK)CMP2OK 0 (DIEROK)DIEROK

Description

Interrupt and Status Register (output mode)

Fields

CC1IF

Compare 1 interrupt flag

ARRM

Autoreload match

EXTTRIG

External trigger edge event

CMP1OK

Compare register 1 update OK

ARROK

Autoreload register update OK

UP

Counter direction change down to up

DOWN

Counter direction change up to down

UE

LPTIM update event occurred

REPOK

Repetition register update Ok

CC2IF

Compare 2 interrupt flag

CMP2OK

Compare register 2 update OK

DIEROK

Interrupt enable register update OK

Links

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