STMicroelectronics /STM32U5Gx /OTG_HS /HFIR

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Interpret as HFIR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FRIVL0 (RLDCTRL)RLDCTRL

Description

This register stores the frame interval information for the current speed to which the OTG controller has enumerated.

Fields

FRIVL

FRIVL

RLDCTRL

RLDCTRL

Links

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