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SiFive /sifive_hifive_unmatched_a00 /sifive_pwm0_0 /pwmcfg

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Interpret as pwmcfg

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0pwmscale 0 (pwmsticky)pwmsticky 0 (pwmzerocmp)pwmzerocmp 0 (pwmdeglitch)pwmdeglitch 0 (pwmenalways)pwmenalways 0 (pwmenoneshot)pwmenoneshot 0 (pwmcmp0center)pwmcmp0center 0 (pwmcmp1center)pwmcmp1center 0 (pwmcmp2center)pwmcmp2center 0 (pwmcmp3center)pwmcmp3center 0 (pwmcmp0invert)pwmcmp0invert 0 (pwmcmp1invert)pwmcmp1invert 0 (pwmcmp2invert)pwmcmp2invert 0 (pwmcmp3invert)pwmcmp3invert 0 (pwmcmp0gang)pwmcmp0gang 0 (pwmcmp1gang)pwmcmp1gang 0 (pwmcmp2gang)pwmcmp2gang 0 (pwmcmp3gang)pwmcmp3gang 0 (pwmcmp0ip)pwmcmp0ip 0 (pwmcmp1ip)pwmcmp1ip 0 (pwmcmp2ip)pwmcmp2ip 0 (pwmcmp3ip)pwmcmp3ip

Description

PWM configuration register

Fields

pwmscale

PWM Counter scale
pwmsticky

PWM Sticky - disallow clearing pwmcmpXip bits
pwmzerocmp

PWM Zero - counter resets to zero after match
pwmdeglitch

PWM Deglitch - latch pwmcmpXip within same cycle
pwmenalways

PWM enable always - run continuously
pwmenoneshot

PWM enable one shot - run one cycle
pwmcmp0center

PWM0 Compare Center
pwmcmp1center

PWM1 Compare Center
pwmcmp2center

PWM2 Compare Center
pwmcmp3center

PWM3 Compare Center
pwmcmp0invert

PWM0 Invert
pwmcmp1invert

PWM1 Invert
pwmcmp2invert

PWM2 Invert
pwmcmp3invert

PWM3 Invert
pwmcmp0gang

PWM0/PWM1 Compare Gang
pwmcmp1gang

PWM1/PWM2 Compare Gang
pwmcmp2gang

PWM2/PWM3 Compare Gang
pwmcmp3gang

PWM3/PWM0 Compare Gang
pwmcmp0ip

PWM0 Interrupt Pending
pwmcmp1ip

PWM1 Interrupt Pending
pwmcmp2ip

PWM2 Interrupt Pending
pwmcmp3ip

PWM3 Interrupt Pending

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data