Regviz

Spansion /MB9BF42xS /RTC /WTTR

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Interpret as WTTR

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https://regviz.com/r/Spansion/MB9AF42xL/RTC/WTTR#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (TM0)TM0 0 (TM1)TM1 0 (TM2)TM2 0 (TM3)TM3 0 (TM4)TM4 0 (TM5)TM5 0 (TM6)TM6 0 (TM7)TM7 0 (TM8)TM8 0 (TM9)TM9 0 (TM10)TM10 0 (TM11)TM11 0 (TM12)TM12 0 (TM13)TM13 0 (TM14)TM14 0 (TM15)TM15 0 (TM16)TM16 0 (TM17)TM17

Description

register WTTR

Fields

TM0

bitfield TM0
TM1

bitfield TM1
TM2

bitfield TM2
TM3

bitfield TM3
TM4

bitfield TM4
TM5

bitfield TM5
TM6

bitfield TM6
TM7

bitfield TM7
TM8

bitfield TM8
TM9

bitfield TM9
TM10

bitfield TM10
TM11

bitfield TM11
TM12

bitfield TM12
TM13

bitfield TM13
TM14

bitfield TM14
TM15

bitfield TM15
TM16

bitfield TM16
TM17

bitfield TM17

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data