Spansion /MB9BF52xM /DMAC /DMACB0

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as DMACB0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (EM)EM 0SS0 (CI)CI 0 (EI)EI 0 (RD)RD 0 (RS)RS 0 (RC)RC 0 (FD)FD 0 (FS)FS 0TW0MS

Description

Configuration B Register

Fields

EM

Enable bit Mask (EB bit clear mask)

SS

Stop Status (stop status notification)

CI

Completion Interrupt (successful transfer completion interrupt enable)

EI

Error Interrupt (unsuccessful transfer completion interrupt enable)

RD

Reload Destination

RS

Reload Source

RC

Reload Count (BC/TC reload)

FD

Fixed Destination

FS

Fixed Source

TW

Transfer Width

MS

Mode Select

Links

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