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stm32 /stm32c0 /STM32C011 /DBG /DBG_CR

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Interpret as DBG_CR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (DBG_STOP)DBG_STOP 0 (DBG_STANDBY)DBG_STANDBY

Description

DBG configuration register

Fields

DBG_STOP

Debug Stop mode
DBG_STANDBY

Debug Standby and Shutdown modes

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32