IWDGRSTF=B_0x0, RMVF=B_0x0, WWDGRSTF=B_0x0, LSION=B_0x0, LSIRDY=B_0x0, OBLRSTF=B_0x0, SFTRSTF=B_0x0, LPWRRSTF=B_0x0, PWRRSTF=B_0x0, PINRSTF=B_0x0
RCC control/status register 2
| LSION | LSI oscillator enable Set and cleared by software to enable/disable the LSI oscillator: 0 (B_0x0): Disable 1 (B_0x1): Enable |
| LSIRDY | LSI oscillator ready Set and cleared by hardware to indicate when the LSI oscillator is ready (stable): After the LSION bit is cleared, LSIRDY goes low after 3 LSI oscillator clock cycles. This bit can be set even if LSION = 0 if the LSI is requested by the Clock Security System on LSE, by the Independent Watchdog or by the RTC. 0 (B_0x0): Not ready 1 (B_0x1): Ready |
| RMVF | Remove reset flags Set by software to clear the reset flags. 0 (B_0x0): No effect 1 (B_0x1): Clear reset flags |
| OBLRSTF | Option byte loader reset flag Set by hardware when a reset from the Option byte loading occurs. Cleared by setting the RMVF bit. 0 (B_0x0): No reset from Option byte loading occurred 1 (B_0x1): Reset from Option byte loading occurred |
| PINRSTF | Pin reset flag Set by hardware when a reset from the NRST pin occurs. Cleared by setting the RMVF bit. 0 (B_0x0): No reset from NRST pin occurred 1 (B_0x1): Reset from NRST pin occurred |
| PWRRSTF | BOR or POR/PDR flag Set by hardware when a BOR or POR/PDR occurs. Cleared by setting the RMVF bit. 0 (B_0x0): No BOR or POR occurred 1 (B_0x1): BOR or POR occurred |
| SFTRSTF | Software reset flag Set by hardware when a software reset occurs. Cleared by setting the RMVF bit. 0 (B_0x0): No software reset occurred 1 (B_0x1): Software reset occurred |
| IWDGRSTF | Independent window watchdog reset flag Set by hardware when an independent watchdog reset domain occurs. Cleared by setting the RMVF bit. 0 (B_0x0): No independent watchdog reset occurred 1 (B_0x1): Independent watchdog reset occurred |
| WWDGRSTF | Window watchdog reset flag Set by hardware when a window watchdog reset occurs. Cleared by setting the RMVF bit. 0 (B_0x0): No window watchdog reset occurred 1 (B_0x1): Window watchdog reset occurred |
| LPWRRSTF | Low-power reset flag Set by hardware when a reset occurs due to illegal Stop, or Standby, or Shutdown mode entry. Cleared by setting the RMVF bit. This operates only if nRST_STOP, or nRST_STDBY or nRST_SHDW option bits are cleared. 0 (B_0x0): No illegal mode reset occurred 1 (B_0x1): Illegal mode reset occurred |