stm32 /stm32c0 /STM32C011 /RTC /RTC_MISR

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Interpret as RTC_MISR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (ALRAMF)ALRAMF 0 (TSMF)TSMF 0 (TSOVMF)TSOVMF

Description

RTC masked interrupt status register

Fields

ALRAMF

Alarm A masked flag This flag is set by hardware when the alarm A interrupt occurs.

TSMF

Timestamp masked flag This flag is set by hardware when a timestamp interrupt occurs.

TSOVMF

Timestamp overflow masked flag This flag is set by hardware when a timestamp interrupt occurs while TSMF is already set. It is recommended to check and then clear TSOVF only after clearing the TSF bit. Otherwise, an overflow might not be noticed if a timestamp event occurs immediately before the TSF bit is cleared.

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