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stm32 /stm32f0 /STM32F0x2 /ADC /CCR

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Interpret as CCR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (VREFEN)VREFEN 0 (TSEN)TSEN 0 (VBATEN)VBATEN

Description

common configuration register

Fields

VREFEN

Temperature sensor and VREFINT enable
TSEN

Temperature sensor enable
VBATEN

VBAT enable

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32