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stm32 /stm32f1 /STM32F101 /BKP /CSR

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Interpret as CSR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (CTE)CTE 0 (CTI)CTI 0 (TPIE)TPIE 0 (TEF)TEF 0 (TIF)TIF

Description

BKP_CSR control/status register (BKP_CSR)

Fields

CTE

Clear Tamper event
CTI

Clear Tamper Interrupt
TPIE

Tamper Pin interrupt enable
TEF

Tamper Event Flag
TIF

Tamper Interrupt Flag

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32