Regviz

stm32 /stm32f1 /STM32F101 /WWDG /SR

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Interpret as SR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (EWI)EWI

Description

Status register (WWDG_SR)

Fields

EWI

Early Wakeup Interrupt

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32