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stm32 /stm32f1 /STM32F103 /ETHERNET_DMA /DMABMR

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Interpret as DMABMR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (SR)SR 0 (DA)DA 0DSL0PBL0RTPR 0 (FB)FB 0RDP0 (USP)USP 0 (FPM)FPM 0 (AAB)AAB

Description

Ethernet DMA bus mode register

Fields

SR

Software reset
DA

DMA Arbitration
DSL

Descriptor skip length
PBL

Programmable burst length
RTPR

Rx Tx priority ratio
FB

Fixed burst
RDP

Rx DMA PBL
USP

Use separate PBL
FPM

4xPBL mode
AAB

Address-aligned beats

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32