Regviz

stm32 /stm32f1 /STM32F103 /ETHERNET_MAC /MACPMTCSR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as MACPMTCSR

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/stm32/stm32f1/STM32F101/ETHERNET_MAC/MACPMTCSR#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (PD)PD 0 (MPE)MPE 0 (WFE)WFE 0 (MPR)MPR 0 (WFR)WFR 0 (GU)GU 0 (WFFRPR)WFFRPR

Description

Ethernet MAC PMT control and status register (ETH_MACPMTCSR)

Fields

PD

Power down
MPE

Magic Packet enable
WFE

Wakeup frame enable
MPR

Magic packet received
WFR

Wakeup frame received
GU

Global unicast
WFFRPR

Wakeup frame filter register pointer reset

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32