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stm32 /stm32f1 /STM32F103 /ETHERNET_PTP /PTPTSLR

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Interpret as PTPTSLR

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https://regviz.com/r/stm32/stm32f1/STM32F101/ETHERNET_PTP/PTPTSLR#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0STSS0 (STPNS)STPNS

Description

Ethernet PTP time stamp low register (ETH_PTPTSLR)

Fields

STSS

System time subseconds
STPNS

System time positive or negative sign

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32