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stm32 /stm32f1 /STM32F103 /UART4 /SR

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Interpret as SR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (PE)PE 0 (FE)FE 0 (NE)NE 0 (ORE)ORE 0 (IDLE)IDLE 0 (RXNE)RXNE 0 (TC)TC 0 (TXE)TXE 0 (LBD)LBD

Description

UART4_SR

Fields

PE

Parity error
FE

Framing error
NE

Noise error flag
ORE

Overrun error
IDLE

IDLE line detected
RXNE

Read data register not empty
TC

Transmission complete
TXE

Transmit data register empty
LBD

LIN break detection flag

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32