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stm32 /stm32f1 /STM32F107 /ETHERNET_MMC /MMCCR

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Interpret as MMCCR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (CR)CR 0 (CSR)CSR 0 (ROR)ROR 0 (MCF)MCF

Description

Ethernet MMC control register (ETH_MMCCR)

Fields

CR

Counter reset
CSR

Counter stop rollover
ROR

Reset on read
MCF

MMC counter freeze

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32