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stm32 /stm32f1 /STM32F107 /RCC /CSR

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Interpret as CSR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (LSION)LSION 0 (LSIRDY)LSIRDY 0 (RMVF)RMVF 0 (PINRSTF)PINRSTF 0 (PORRSTF)PORRSTF 0 (SFTRSTF)SFTRSTF 0 (IWDGRSTF)IWDGRSTF 0 (WWDGRSTF)WWDGRSTF 0 (LPWRRSTF)LPWRRSTF

Description

Control/status register (RCC_CSR)

Fields

LSION

Internal low speed oscillator enable
LSIRDY

Internal low speed oscillator ready
RMVF

Remove reset flag
PINRSTF

PIN reset flag
PORRSTF

POR/PDR reset flag
SFTRSTF

Software reset flag
IWDGRSTF

Independent watchdog reset flag
WWDGRSTF

Window watchdog reset flag
LPWRRSTF

Low-power reset flag

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32