stm32 /stm32f1 /STM32F107 /SPI1 /CR1

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Interpret as CR1

31282724232019161512118743000000000000000000000000000000000000000000 (CPHA)CPHA0 (CPOL)CPOL0 (MSTR)MSTR0BR0 (SPE)SPE0 (LSBFIRST)LSBFIRST0 (SSI)SSI0 (SSM)SSM0 (RXONLY)RXONLY0 (DFF)DFF0 (CRCNEXT)CRCNEXT0 (CRCEN)CRCEN0 (BIDIOE)BIDIOE0 (BIDIMODE)BIDIMODE

Description

control register 1

Fields

CPHA

Clock phase

CPOL

Clock polarity

MSTR

Master selection

BR

Baud rate control

SPE

SPI enable

LSBFIRST

Frame format

SSI

Internal slave select

SSM

Software slave management

RXONLY

Receive only

DFF

Data frame format

CRCNEXT

CRC transfer next

CRCEN

Hardware CRC calculation enable

BIDIOE

Output enable in bidirectional mode

BIDIMODE

Bidirectional data mode enable

Links

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