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stm32 /stm32f2 /STM32F217 /PWR /CSR

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Interpret as CSR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (WUF)WUF 0 (SBF)SBF 0 (PVDO)PVDO 0 (BRR)BRR 0 (EWUP)EWUP 0 (BRE)BRE

Description

power control/status register

Fields

WUF

Wakeup flag
SBF

Standby flag
PVDO

PVD output
BRR

Backup regulator ready
EWUP

Enable WKUP pin
BRE

Backup regulator enable

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32