Regviz

stm32 /stm32f3 /STM32F3x4 /ADC1 /DR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as DR

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/stm32/stm32f3/STM32F302/ADC1/DR#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0regularDATA

Description

regular Data Register

Fields

regularDATA

regularDATA

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32