Regviz

stm32 /stm32f3 /STM32F3x4 /ADC1 /TR1

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Interpret as TR1

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https://regviz.com/r/stm32/stm32f3/STM32F302/ADC1/TR1#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0LT10HT1

Description

watchdog threshold register 1

Fields

LT1

LT1
HT1

HT1

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32