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stm32 /stm32f3 /STM32F3x8 /ADC1 /CFGR

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Interpret as CFGR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (DMAEN)DMAEN 0 (DMACFG)DMACFG 0RES0 (ALIGN)ALIGN 0EXTSEL0EXTEN 0 (OVRMOD)OVRMOD 0 (CONT)CONT 0 (AUTDLY)AUTDLY 0 (DISCEN)DISCEN 0DISCNUM 0 (JDISCEN)JDISCEN 0 (JQM)JQM 0 (AWD1SGL)AWD1SGL 0 (AWD1EN)AWD1EN 0 (JAWD1EN)JAWD1EN 0 (JAUTO)JAUTO 0AWDCH1CH

Description

configuration register

Fields

DMAEN

DMAEN
DMACFG

DMACFG
RES

RES
ALIGN

ALIGN
EXTSEL

EXTSEL
EXTEN

EXTEN
OVRMOD

OVRMOD
CONT

CONT
AUTDLY

AUTDLY
DISCEN

DISCEN
DISCNUM

DISCNUM
JDISCEN

JDISCEN
JQM

JQM
AWD1SGL

AWD1SGL
AWD1EN

AWD1EN
JAWD1EN

JAWD1EN
JAUTO

JAUTO
AWDCH1CH

AWDCH1CH

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32