Regviz

stm32 /stm32f3 /STM32F3x8 /DAC2 /CR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as CR

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/stm32/stm32f3/STM32F373/DAC2/CR#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (EN1)EN1 0 (BOFF1)BOFF1 0 (TEN1)TEN1 0TSEL10 (WAVE2)WAVE2 0 (WAVE1)WAVE1 0 (MAMP10)MAMP10 0 (MAMP11)MAMP11 0 (MAMP12)MAMP12 0 (MAMP13)MAMP13 0 (DMAEN1)DMAEN1 0 (DMAUDRIE1)DMAUDRIE1

Description

control register

Fields

EN1

DAC channel1 enable
BOFF1

DAC channel1 output buffer disable
TEN1

DAC channel1 trigger enable
TSEL1

DAC channel1 trigger selection
WAVE2

WAVE2
WAVE1

DAC channel1 noise/triangle wave generation enable
MAMP10

MAMP10
MAMP11

MAMP11
MAMP12

MAMP12
MAMP13

DAC channel1 mask/amplitude selector
DMAEN1

DAC channel1 DMA enable
DMAUDRIE1

DAC channel1 DMA Underrun Interrupt enable

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32