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stm32 /stm32f3 /STM32F3x8 /Flash /OBR

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Interpret as OBR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (OPTERR)OPTERR 0 (LEVEL1_PROT)LEVEL1_PROT 0 (LEVEL2_PROT)LEVEL2_PROT 0 (WDG_SW)WDG_SW 0 (nRST_STOP)nRST_STOP 0 (nRST_STDBY)nRST_STDBY 0 (BOOT1)BOOT1 0 (VDDA_MONITOR)VDDA_MONITOR 0 (SRAM_PARITY_CHECK)SRAM_PARITY_CHECK 0 (SDADC12_VDD_MONITOR)SDADC12_VDD_MONITOR 0Data00Data1

Description

Option byte register

Fields

OPTERR

Option byte error
LEVEL1_PROT

Level 1 protection status
LEVEL2_PROT

Level 2 protection status
WDG_SW

WDG_SW
nRST_STOP

nRST_STOP
nRST_STDBY

nRST_STDBY
BOOT1

BOOT1
VDDA_MONITOR

VDDA_MONITOR
SRAM_PARITY_CHECK

SRAM_PARITY_CHECK
SDADC12_VDD_MONITOR

SDADC12_VDD_MONITOR
Data0

Data0
Data1

Data1

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32