Regviz

stm32 /stm32f3 /STM32F3x8 /TIM1 /CCER

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Interpret as CCER

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (CC1E)CC1E 0 (CC1P)CC1P 0 (CC1NE)CC1NE 0 (CC1NP)CC1NP 0 (CC2E)CC2E 0 (CC2P)CC2P 0 (CC2NE)CC2NE 0 (CC2NP)CC2NP 0 (CC3E)CC3E 0 (CC3P)CC3P 0 (CC3NE)CC3NE 0 (CC3NP)CC3NP 0 (CC4E)CC4E 0 (CC4P)CC4P 0 (CC4NP)CC4NP 0 (CC5E)CC5E 0 (CC5P)CC5P 0 (CC6E)CC6E 0 (CC6P)CC6P

Description

capture/compare enable register

Fields

CC1E

Capture/Compare 1 output enable
CC1P

Capture/Compare 1 output Polarity
CC1NE

Capture/Compare 1 complementary output enable
CC1NP

Capture/Compare 1 output Polarity
CC2E

Capture/Compare 2 output enable
CC2P

Capture/Compare 2 output Polarity
CC2NE

Capture/Compare 2 complementary output enable
CC2NP

Capture/Compare 2 output Polarity
CC3E

Capture/Compare 3 output enable
CC3P

Capture/Compare 3 output Polarity
CC3NE

Capture/Compare 3 complementary output enable
CC3NP

Capture/Compare 3 output Polarity
CC4E

Capture/Compare 4 output enable
CC4P

Capture/Compare 3 output Polarity
CC4NP

Capture/Compare 4 output Polarity
CC5E

Capture/Compare 5 output enable
CC5P

Capture/Compare 5 output Polarity
CC6E

Capture/Compare 6 output enable
CC6P

Capture/Compare 6 output Polarity

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32