Cut and paste this URL to share the unmodified register and value:
https://regviz.com/r/stm32/stm32f4/STM32F405/FSMC/SDCR2#0x0
SDRAM Control Register 2
Number of column address bits
Number of row address bits
Memory data bus width
Number of internal banks
CAS latency
Write protection
SDRAM clock configuration
https://github.com/modm-io/cmsis-svd-stm32