Regviz

stm32 /stm32f4 /STM32F412 /ADC1 /SQR3

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Interpret as SQR3

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https://regviz.com/r/stm32/stm32f7/STM32F730/ADC2/SQR3#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0SQ10SQ20SQ30SQ40SQ50SQ6

Description

regular sequence register 3

Fields

SQ1

1st conversion in regular sequence
SQ2

2nd conversion in regular sequence
SQ3

3rd conversion in regular sequence
SQ4

4th conversion in regular sequence
SQ5

5th conversion in regular sequence
SQ6

6th conversion in regular sequence

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32