Regviz

stm32 /stm32f4 /STM32F412 /TIM10 /CCMR1_Output

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as CCMR1_Output

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/stm32/stm32f7/STM32F746/TIM10/CCMR1_Output#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0CC1S 0 (OC1FE)OC1FE 0 (OC1PE)OC1PE 0OC1M

Description

capture/compare mode register 1 (output mode)

Fields

CC1S

Capture/Compare 1 selection
OC1FE

Output Compare 1 fast enable
OC1PE

Output Compare 1 preload enable
OC1M

Output Compare 1 mode

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32