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stm32 /stm32f4 /STM32F439 /FLASH /OPTCR

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Interpret as OPTCR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (OPTLOCK)OPTLOCK 0 (OPTSTRT)OPTSTRT 0BOR_LEV 0 (BFB2)BFB2 0 (WDG_SW)WDG_SW 0 (nRST_STOP)nRST_STOP 0 (nRST_STDBY)nRST_STDBY 0RDP0nWRP0 (DB1M)DB1M 0 (SPRMOD)SPRMOD

Description

Flash option control register

Fields

OPTLOCK

Option lock
OPTSTRT

Option start
BOR_LEV

BOR reset Level
BFB2

Dual-bank Boot option byte
WDG_SW

WDG_SW User option bytes
nRST_STOP

nRST_STOP User option bytes
nRST_STDBY

nRST_STDBY User option bytes
RDP

Read protect
nWRP

Not write protect
DB1M

Dual-bank on 1 Mbyte Flash memory devices
SPRMOD

Selection of protection mode for nWPRi bits

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32