Cut and paste this URL to share the unmodified register and value:
https://regviz.com/r/stm32/stm32f4/STM32F413/SAI/BCR2#0x0
BConfiguration register 2
FIFO threshold
FIFO flush
Tristate management on data line
Mute
Mute value
Mute counter
Complement bit
Companding mode
https://github.com/modm-io/cmsis-svd-stm32