stm32 /stm32f7 /STM32F756 /SAI1 /ASR

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Interpret as ASR

31282724232019161512118743000000000000000000000000000000000000000000 (OVRUDR)OVRUDR0 (MUTEDET)MUTEDET0 (WCKCFG)WCKCFG0 (FREQ)FREQ0 (CNRDY)CNRDY0 (AFSDET)AFSDET0 (LFSDET)LFSDET0FLVL

Description

AStatus register

Fields

OVRUDR

Overrun / underrun

MUTEDET

Mute detection

WCKCFG

Wrong clock configuration flag. This bit is read only.

FREQ

FIFO request

CNRDY

Codec not ready

AFSDET

Anticipated frame synchronization detection

LFSDET

Late frame synchronization detection

FLVL

FIFO level threshold

Links

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