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stm32 /stm32f7 /STM32F768 /RCC /AHB1RSTR

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Interpret as AHB1RSTR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (GPIOARST)GPIOARST 0 (GPIOBRST)GPIOBRST 0 (GPIOCRST)GPIOCRST 0 (GPIODRST)GPIODRST 0 (GPIOERST)GPIOERST 0 (GPIOFRST)GPIOFRST 0 (GPIOGRST)GPIOGRST 0 (GPIOHRST)GPIOHRST 0 (GPIOIRST)GPIOIRST 0 (GPIOJRST)GPIOJRST 0 (GPIOKRST)GPIOKRST 0 (CRCRST)CRCRST 0 (DMA1RST)DMA1RST 0 (DMA2RST)DMA2RST 0 (DMA2DRST)DMA2DRST 0 (ETHMACRST)ETHMACRST 0 (OTGHSRST)OTGHSRST

Description

AHB1 peripheral reset register

Fields

GPIOARST

IO port A reset
GPIOBRST

IO port B reset
GPIOCRST

IO port C reset
GPIODRST

IO port D reset
GPIOERST

IO port E reset
GPIOFRST

IO port F reset
GPIOGRST

IO port G reset
GPIOHRST

IO port H reset
GPIOIRST

IO port I reset
GPIOJRST

IO port J reset
GPIOKRST

IO port K reset
CRCRST

CRC reset
DMA1RST

DMA2 reset
DMA2RST

DMA2 reset
DMA2DRST

DMA2D reset
ETHMACRST

Ethernet MAC reset
OTGHSRST

USB OTG HS module reset

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32