Regviz

stm32 /stm32f7 /STM32F777 /CAN1 /MSR

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Interpret as MSR

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https://regviz.com/r/stm32/stm32f1/STM32F101/CAN1/MSR#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (INAK)INAK 0 (SLAK)SLAK 0 (ERRI)ERRI 0 (WKUI)WKUI 0 (SLAKI)SLAKI 0 (TXM)TXM 0 (RXM)RXM 0 (SAMP)SAMP 0 (RX)RX

Description

master status register

Fields

INAK

INAK
SLAK

SLAK
ERRI

ERRI
WKUI

WKUI
SLAKI

SLAKI
TXM

TXM
RXM

RXM
SAMP

SAMP
RX

RX

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32