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stm32 /stm32f7 /STM32F777 /DSI /DSI_WIER

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Interpret as DSI_WIER

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (TEIE)TEIE 0 (ERIE)ERIE 0 (PLLLIE)PLLLIE 0 (PLLUIE)PLLUIE 0 (RRIE)RRIE

Description

DSI Wrapper Interrupt Enable Register

Fields

TEIE

Tearing Effect Interrupt Enable
ERIE

End of Refresh Interrupt Enable
PLLLIE

PLL Lock Interrupt Enable
PLLUIE

PLL Unlock Interrupt Enable
RRIE

Regulator Ready Interrupt Enable

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32