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stm32 /stm32f7 /STM32F777 /LTCD /GCR

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Interpret as GCR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (LTDCEN)LTDCEN 0DBW0DGW0DRW0 (DEN)DEN 0 (PCPOL)PCPOL 0 (DEPOL)DEPOL 0 (VSPOL)VSPOL 0 (HSPOL)HSPOL

Description

Global Control Register

Fields

LTDCEN

LCD-TFT controller enable bit
DBW

Dither Blue Width
DGW

Dither Green Width
DRW

Dither Red Width
DEN

Dither Enable
PCPOL

Pixel Clock Polarity
DEPOL

Data Enable Polarity
VSPOL

Vertical Synchronization Polarity
HSPOL

Horizontal Synchronization Polarity

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32