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stm32 /stm32f7 /STM32F777 /PWR /CSR2

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Interpret as CSR2

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (WUPF1)WUPF1 0 (WUPF2)WUPF2 0 (WUPF3)WUPF3 0 (WUPF4)WUPF4 0 (WUPF5)WUPF5 0 (WUPF6)WUPF6 0 (EWUP1)EWUP1 0 (EWUP2)EWUP2 0 (EWUP3)EWUP3 0 (EWUP4)EWUP4 0 (EWUP5)EWUP5 0 (EWUP6)EWUP6

Description

power control/status register

Fields

WUPF1

Wakeup Pin flag for PA0
WUPF2

Wakeup Pin flag for PA2
WUPF3

Wakeup Pin flag for PC1
WUPF4

Wakeup Pin flag for PC13
WUPF5

Wakeup Pin flag for PI8
WUPF6

Wakeup Pin flag for PI11
EWUP1

Enable Wakeup pin for PA0
EWUP2

Enable Wakeup pin for PA2
EWUP3

Enable Wakeup pin for PC1
EWUP4

Enable Wakeup pin for PC13
EWUP5

Enable Wakeup pin for PI8
EWUP6

Enable Wakeup pin for PI11

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32