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stm32 /stm32f7 /STM32F777 /RCC /AHB3ENR

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Interpret as AHB3ENR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (FMCEN)FMCEN 0 (QSPIEN)QSPIEN

Description

AHB3 peripheral clock enable register

Fields

FMCEN

Flexible memory controller module clock enable
QSPIEN

Quad SPI memory controller clock enable

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32