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stm32 /stm32f7 /STM32F777 /TIM1 /AF1

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Interpret as AF1

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (BKINE)BKINE 0 (BKDFBKE)BKDFBKE 0 (BKINP)BKINP

Description

alternate function option register 1

Fields

BKINE

BRK BKIN input enable
BKDFBKE

BRK DFSDM_BREAK[0] enable
BKINP

BRK BKIN input polarity

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32