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stm32 /stm32f7 /STM32F778 /ADC_Common /CCR

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Interpret as CCR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0MULTI0DELAY0 (DDS)DDS 0DMA0ADCPRE 0 (VBATE)VBATE 0 (TSVREFE)TSVREFE

Description

ADC common control register

Fields

MULTI

MULTI
DELAY

DELAY
DDS

DDS
DMA

DMA
ADCPRE

ADCPRE
VBATE

VBATE
TSVREFE

TSVREFE

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32