Regviz

stm32 /stm32f7 /STM32F778 /DSI /DSI_TCCR0

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as DSI_TCCR0

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/stm32/stm32f7/STM32F767/DSI/DSI_TCCR0#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0LPRX_TOCNT0HSTX_TOCNT

Description

DSI Host Timeout Counter Configuration Register 0

Fields

LPRX_TOCNT

Low-power Reception Timeout Counter
HSTX_TOCNT

High-Speed Transmission Timeout Counter

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32