Regviz

stm32 /stm32f7 /STM32F779 /CAN1 /BTR

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Interpret as BTR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0BRP0TS10TS20SJW0 (LBKM)LBKM 0 (SILM)SILM

Description

bit timing register

Fields

BRP

BRP
TS1

TS1
TS2

TS2
SJW

SJW
LBKM

LBKM
SILM

SILM

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32