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stm32 /stm32f7 /STM32F779 /DFSDM /DFSDM_CHDATIN4R

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Interpret as DFSDM_CHDATIN4R

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0INDAT00INDAT1

Description

DFSDM channel data input register

Fields

INDAT0

Input data for channel 4
INDAT1

Input data for channel 5

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32