Regviz

stm32 /stm32g0 /STM32G041 /ADC /DR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as DR

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https://regviz.com/r/stm32/stm32g0/STM32G031/ADC/DR#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0regularDATA

Description

ADC group regular conversion data register

Fields

regularDATA

ADC group regular conversion data

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32