Regviz

stm32 /stm32g0 /STM32G051 /SYSCFG /ITLINE16

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Interpret as ITLINE16

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (TIM3)TIM3 0 (TIM4)TIM4

Description

interrupt line 16 status register

Fields

TIM3

TIM3
TIM4

TIM4

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32