Regviz

stm32 /stm32g0 /STM32G0B0 /PWR /SR2

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Interpret as SR2

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (FLASH_RDY)FLASH_RDY 0 (REGLPS)REGLPS 0 (REGLPF)REGLPF 0 (VOSF)VOSF

Description

Power status register 2

Fields

FLASH_RDY

Flash ready flag
REGLPS

Low-power regulator started
REGLPF

Low-power regulator flag
VOSF

Voltage scaling flag

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32