Regviz

stm32 /stm32g0 /STM32G0B1 /SYSCFG /ITLINE28

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Interpret as ITLINE28

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https://regviz.com/r/stm32/stm32g0/STM32G031/SYSCFG/ITLINE28#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (USART2)USART2 0 (LPUART2)LPUART2

Description

interrupt line 28 status register

Fields

USART2

USART2
LPUART2

LPUART2

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32