Regviz

stm32 /stm32g0 /STM32G0C1 /EXTI /RTSR2

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Interpret as RTSR2

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https://regviz.com/r/stm32/stm32g0/STM32G0B1/EXTI/RTSR2#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (RT2)RT2

Description

EXTI rising trigger selection register 2

Fields

RT2

Rising trigger event configuration bit of configurable line 34

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32