Regviz

stm32 /stm32g0 /STM32G0C1 /WWDG /WWDG_SR

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Interpret as WWDG_SR

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https://regviz.com/r/stm32/stm32g0/STM32G050/WWDG/WWDG_SR#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (EWIF)EWIF

Description

Status register

Fields

EWIF

Early wakeup interrupt flag

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32