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stm32 /stm32g4 /STM32G471 /RTC /SHIFTR

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Interpret as SHIFTR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0SUBFS0 (ADD1S)ADD1S

Description

shift control register

Fields

SUBFS

Subtract a fraction of a second
ADD1S

Add one second

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32