stm32 /stm32h5 /STM32H523 /FDCAN /FDCAN_RXGFC

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Interpret as FDCAN_RXGFC

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)RRFE 0 (B_0x0)RRFS 0 (B_0x0)ANFE 0 (B_0x0)ANFS 0 (F1OM)F1OM 0 (F0OM)F0OM 0 (B_0x0)LSS0 (B_0x0)LSE

LSE=B_0x0, RRFE=B_0x0, ANFE=B_0x0, ANFS=B_0x0, RRFS=B_0x0, LSS=B_0x0

Description

FDCAN global filter configuration register

Fields

RRFE

Reject remote frames extended

0 (B_0x0): Filter remote frames with 29-bit standard IDs

1 (B_0x1): Reject all remote frames with 29-bit standard IDs

RRFS

Reject remote frames standard

0 (B_0x0): Filter remote frames with 11-bit standard IDs

1 (B_0x1): Reject all remote frames with 11-bit standard IDs

ANFE

Accept non-matching frames extended

0 (B_0x0): Accept in Rx FIFO 0

1 (B_0x1): Accept in Rx FIFO 1

2 (B_0x2): Reject

3 (B_0x3): Reject

ANFS

Accept Non-matching frames standard

0 (B_0x0): Accept in Rx FIFO 0

1 (B_0x1): Accept in Rx FIFO 1

2 (B_0x2): Reject

3 (B_0x3): Reject

F1OM

FIFO 1 operation mode (overwrite or blocking)

F0OM

FIFO 0 operation mode (overwrite or blocking)

LSS

List size standard

0 (B_0x0): No standard message ID filter

LSE

List size extended

0 (B_0x0): No extended message ID filter

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